Final Program

9th IEEE/ACM International Symposium on Networks-on-Chip

September 28th – 30th, 2015-Vancouver, Canada

 

Monday, 28th September
7:45 - 8:45 AM Breakfast (Salon E)
8:45 - 9:00 AM Program Introduction (Salon F)
9:00 - 10:00 AM Keynote 1 (Salon F)
Speaker: Karam Chatha, Qualcomm
Title: Mobile Compute Architectures: Opportunities and Challenges
10:00 - 10:30 AM Coffee Break (Salon F)
10:30 - 12:00 PM SESSION 1: Emerging Technologies (Salon F)
Session Chair: Koushik Chakraborty, Utah State University
Parka: Thermally Insulated Nanophotonic Interconnects
Yigit Demir and Nikos Hardavellas
Northwestern University
An Interconnection Architecture for Seamless Inter and Intra-Chip Communication Using Wireless Links
Md Shahriar Shamim, Jagan Muralidharan and Amlan Ganguly
Rochester Institute of Technology
Accurate System-level TSV-to-TSV Capacitive Coupling Fault Model for 3D-NoC
Pooria Yaghini, Ashkan Eghbal, Siavash Sedighzadeh Yazdi and Nader Bagherzadeh
University of California, Irvine
12:00 - 1:30 PM Lunch (Salon E)
1:30 - 3:30 PM SPECIAL SESSION 1: NOC Testing, Diagnosis, and Fault Tolerance (Salon F)
Session Chair: Paul Bogdan, University of Southern California
Fabrics on die: Where function, debug and test meet
Priyadarsan Patra and Chinna Prudvi
Intel
Multi-Layer Test and Diagnosis for Dependable NoCs
Hans-Joachim Wunderlich and Martin Radetzki
University of Stuttgart
A framework for combining concurrent checking and on-line embedded test for low-latency fault detection in NoC routers
Pietro Saltarelli1, Behrad Niazmand2, Jaan Raik2, Ranganathan Hariharan3, Vineeth Govind2, Thomas Hollstein2, Gert Jervan2
1Università degli Studi di Ferrara, 2Tallinn University of Technology, 3Nokia
Fault-Tolerant 3D NoC Architecture and Design: Recent Advances and Challenges
Li Jiang1 and Qiang Xu2
1Shanghai Jiao Tong University, 2The Chinese University of Hong Kong
3:30 - 4:00 PM Coffee Break (Salon F)
4:00 - 5:30 PM SESSION 2: Fault Tolerance and Reliability (Salon F)
Session Chair: 
Vassos Soteriou, Cyprus University of Technology
Runtime Detection of a Bandwidth Denial Attack from a Rogue Network-on-Chip
Rajesh Jayashankara Shridevi, Dean Michael Ancajas, Koushik Chakraborty and Sanghamitra Roy
Utah State University
Fault-tolerant Network-on-Chip based on Fault-aware Flits and Deflection Routing
Armin Runge
University of Wuerzburg
Highly Fault-tolerant NoC Routing with Application-aware Congestion Management
Doowon Lee, Ritesh Parikh and Valeria Bertacco
University of Michigan
6:00 - 8:00 PM Welcome Reception (Tuscany)

 

Tuesday, 29th September
8:00 - 9:00 AM Breakfast (Salon E)
9:00 - 10:00 AM Keynote 2 (Salon F)
Sudhakar Yalamanchili, Georgia Institute of Technology
Title: Implications of Memory-Centric Computing Architectures for Future NoCs
10:00 - 10:30 AM Coffee Break (Salon F)
10:30 - 12:00 AM SPECIAL SESSION 2: Wireless NoC (Salon F)
Session Chair: 
Danella Zhao, University of Louisiana
On-chip mmWave Antennas and Transceivers
Ofer Markish, Oded Katz, Benny Sheinman, Dan Corcos, and Danny Elad
IBM
Networking Challenges and Prospective Impact of Broadcast-Oriented Wireless Networks-on-Chip
Sergi Abadal1, Mario Nemirovsky2, Eduard Alarcón1, Albert Cabellos-Aparicio
1UPC – BarcelonaTech, 2Barcelona Supercomputing Center
Reconfigurable Wireless Network-on-Chip with a Dynamic Medium Access Mechanism
Naseef Mansoor, Amlan Ganguly
Rochester Institute of Technology
12:00 - 1:30 PM Lunch (Salon E)
1:30 - 3:00 PM SESSION 3: Link Design (Salon F)
Session Chair: 
Turbo Majumder, Intel
Exploiting Transmission Lines on Heterogeneous Networks-on-Chip to Improve the Adaptivity and Efficiency of Cache Coherence
Qi Hu1, Peng Liu1, Michael C. Huang2 and Xiang-Hui Xie3
1Zhejiang University, 2University of Rochester, 3State Key Laboratory of Mathematical Engineering and Advanced Computing, China
Highway in TDM NoCs*
shaoteng liu1, Zhonghai Lu1 and Axel Jantsch2
1KTH Royal Institute of Technology, 2Vienna University of Technology
On-Chip Decentralized Routers with Balanced Pipelines for Avoiding Interconnect Bottleneck
Ryota Yasudo1, Hiroki Matsutani1, Michihiro Koibuchi2, Hideharu Amano1 and Tadao Nakamura1
1Keio University, 2National Institute of Informatics, Japan
3:00 - 4:00 PM Coffee Break + Poster Session (Grand Foyer)
1. Wear-Aware Adaptive Routing for Networks-on-Chips
Arseniy Vitkovskiy1, Vassos Soteriou1, Paul V. Gratz2
1Cyprus University of Technology, 2Texas A&M University
2. ARTEMIS: An Aging-Aware Run-Time Application Mapping Framework for 3D NoC based Chip Multiprocessors
Nishit KAPADIA, Venkata Yaswanth Raparti and Sudeep Pasricha
Colorado State University
3. Achievable Performance Enhancements with mm-Wave Wireless Interconnects in NoC
Sri Harsha Gade and Sujay Deb
IIIT, Delhi
4. Novel Hybrid Wired-Wireless Network-on-Chip Architectures: Transducer and Communication Fabric Design
Michael Opoku Agyeman1, Wen Zong1, Ji-Xiang Wan2, Kenneth Tong3, Alex Yakovlev4 and Terrence Mak1
1The Chinese University of Hong Kong, 2Xian Institute of Space Radio Technology, 3UCL, London, 4Newcastle University
5. Designing High-Performance, Power-Efficient NoCs With Embedded Silicon-in-Silica Nanophotonics
Elena Kakoulli, Vassos Soteriou, Charalambos Koutsides and Kyriacos Kalli
Cyprus University of Technology
4:00 - 5:30 PM Session 4: Routing (Salon F)
Session Chair: 
Ajay Joshi, Boston University
User Cooperation Network Coding Approach for NoC Performance
Yuankun Xue and Paul Bogdan
University of Southern California
A Low-Overhead, Fully-Distributed, Guaranteed-Delivery Routing Algorithm for Faulty Network-on-Chips*
Mohammad Fattah1, Antti Airola1, Rachata Ausavarungnirun2, Nima Mirzaei3, Pasi Liljeberg1, Juha Plosila1, Siamak Mohammadi3, Tapio Pahikkala1, Onur Mutlu2 and Hannu Tenhunen1, 4
1University of Turku, 2Carnegie Mellon University, 3University of Tehran, 4Royal Institute of Technology– KTH
Unbiased Regional Congestion Aware Selection Function For NoCs
Wen Zong, Michael Opoku Agyeman and Terrence Mak
The Chinese University of Hong Kong
7:00 - 10:00 PM Banquet Dinner (Tuscany)
Banquet Presentation: Radu Marculescu (Carnegie Mellon University)
Title: Beyond NoCs: New Applications, New Platforms, and the Road Ahead Toward Designing New "Things"

 

Wednesday, 30th September
7:30 - 8:00 AM Breakfast (Salon E)
8:30 - 10:00 AM Session 5: Modeling (Salon F)
Session Chair: 
Axel Jantsch, Vienna University of Technology
Modeling and Design of High-Radix On-Chip Crossbar Switches
Cagla Cakir1, Ron Ho2, Jon Lexau3 and Ken Mai1
1Carnegie Mellon University, 2Altera, 3Oracle
Mathematical Modeling and Control of Multifractal Workloads for Data-Center-on-a-Chip Optimization
Paul Bogdan
University of Southern California
Data Criticality in Network-On-Chip Design*
Joshua San Miguel and Natalie Enright Jerger
University of Toronto
10:00 - 10:30 AM Coffee Break (Salon F)
10:30 - 12:30 PM SPECIAL SESSION 3: Dark Silicon – From Computation to Communication (Salon F)
Session Chair: 
Amlan Ganguly, Rochester Institute of technology
Dark Silicon: An Overview and State-of-the-Art
Jörg Henkel
Karlsruhe Institute of Technology (KIT)
Managing On-Chip Resources in Dark Silicon Chips
Muhammad Shafique
Karlsruhe Institute of Technology (KIT)

Dark Silicon for Communication Resources: DarkNOC
Pasindu Aluthwala

University of New South Wales

Synthesizing Heterogeneous Dark Silicon Systems
Umit Ogras
Arizona State University
12:30 - 1:30 PM Lunch (Salon E)
1:30 - 3:00 PM SESSION 6: Workload Specific Architecture (Salon F)
Session Chair:
Martin Radetzki, University of Stuttgart
Improving DVFS in NoCs with Coherence Prediction
Robert Hesse and Natalie Enright Jerger
University of Toronto
Asymmetric NoC Architectures for GPU Systems
Amir Kavyan Ziabari1, José Luis Abellán Miguel2, Yenai Ma3, Ajay Joshi3 and David Kaeli1
1Northeastern University, 2Universidad Católica San Antonio de Murcia, 3Boston University
MapPro - Proactive Runtime Mapping for Dynamic Workloads by Quantifying Ripple Effect of Applications on Network
Mohammad-Hashem Haghbayan1, Anil Kanduri1, Amir-Mohammad Rahmani1, 2, Pasi Liljeberg1, Axel Jantsch3 and Hannu Tenhunen1, 2
1University of Turku, 2KTH Royal Institute of Technology, 3TU Wien,
3:00 - 3:30 PM Coffee Break (Salon F)
3:30 - 5:00 PM Special Session 4: NoC as Enabler for Biological Discovery and Precise Medicine (Salon F)
Session Chair: Hiroki Matsutani
, Keio University
Making Precise Medicine a Reality: Design Challenges and Opportunities
Paul Bogdan
University of Southern California
Leveraging NoC for Computational Molecular Biology
Turbo Majumder
Intel
Integrating Experiments, Simulations and Theory to Understand the Molecular Basis of Cellular Function
Arvind Ramanathan
Oak Ridge National Laboratory

*Best Paper Award Candidates